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author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-01 12:49:58 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-01 12:49:58 -0700 |
commit | e5e5b0119d6219782c834d29a63a7bb152a68dc5 (patch) | |
tree | 6de1227ae1bf9ce1b376cf1c80bffdf8767a68d9 /src/arch/x86/isa/microops | |
parent | 7da3a8e65cf800c2a779440c997aad1422e68d77 (diff) | |
download | gem5-e5e5b0119d6219782c834d29a63a7bb152a68dc5.tar.xz |
X86: Fix for compilation bug with new cache code.
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
Diffstat (limited to 'src/arch/x86/isa/microops')
-rw-r--r-- | src/arch/x86/isa/microops/ldstop.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa index 18cbc6082..b8cddb09b 100644 --- a/src/arch/x86/isa/microops/ldstop.isa +++ b/src/arch/x86/isa/microops/ldstop.isa @@ -170,7 +170,7 @@ def template MicroLoadCompleteAcc {{ %(op_rd)s; Mem = pkt->get<typeof(Mem)>(); - int offset = pkt->flags; + int offset = pkt->req->getFlags(); Mem = bits(Mem, (offset + dataSize) * 8 - 1, offset * 8); %(code)s; |