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author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-10 17:27:33 +0000 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-10 17:27:33 +0000 |
commit | fcc35a67e0cfa2e627ebba3fca0252bfb18f03c6 (patch) | |
tree | cd7bb69a26beca9bae831112a79b56cc3d4bbbfa /src/arch/x86/isa/microops | |
parent | f71a6c8fed86c62d309908f37311456e8ec7a588 (diff) | |
parent | 74122c04cf8105d507f390c456c6e3c113b5a56e (diff) | |
download | gem5-fcc35a67e0cfa2e627ebba3fca0252bfb18f03c6.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
Diffstat (limited to 'src/arch/x86/isa/microops')
-rw-r--r-- | src/arch/x86/isa/microops/base.isa | 49 | ||||
-rw-r--r-- | src/arch/x86/isa/microops/microops.isa | 3 |
2 files changed, 37 insertions, 15 deletions
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa index 4254994f3..f0aab7872 100644 --- a/src/arch/x86/isa/microops/base.isa +++ b/src/arch/x86/isa/microops/base.isa @@ -69,20 +69,33 @@ output header {{ class X86MicroOpBase : public X86StaticInst { protected: + const char * instMnem; uint8_t opSize; uint8_t addrSize; - X86MicroOpBase(bool isMicro, bool isDelayed, + X86MicroOpBase(ExtMachInst _machInst, + const char *mnem, const char *_instMnem, + bool isMicro, bool isDelayed, bool isFirst, bool isLast, - const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - X86StaticInst(mnem, _machInst, __opClass) + X86StaticInst(mnem, _machInst, __opClass), + instMnem(_instMnem) { flags[IsMicroOp] = isMicro; flags[IsDelayedCommit] = isDelayed; flags[IsFirstMicroOp] = isFirst; flags[IsLastMicroOp] = isLast; } + + std::string generateDisassembly(Addr pc, + const SymbolTable *symtab) const + { + std::stringstream ss; + + ccprintf(ss, "\t%s.%s", instMnem, mnemonic); + + return ss.str(); + } }; }}; @@ -127,7 +140,7 @@ let {{ }}; // A tmeplate for building a specialized version of the microcode -// instruction which knows specifies which arguments it wants +// instruction which specifies which arguments it wants def template MicroOpDeclare {{ template<> class %(class_name)s%(signature)s : public X86MicroOpBase @@ -137,11 +150,15 @@ def template MicroOpDeclare {{ void buildMe(); public: - %(class_name)s(bool isMicro, bool isDelayed, - bool isFirst, bool isLast, - ExtMachInst _machInst %(param_arg_dec)s); + %(class_name)s(ExtMachInst _machInst, + const char * instMnem, + bool isMicro, bool isDelayed, + bool isFirst, bool isLast + %(param_arg_dec)s); - %(class_name)s(ExtMachInst _machInst %(param_arg_dec)s); + %(class_name)s(ExtMachInst _machInst, + const char * instMnem + %(param_arg_dec)s); %(BasicExecDeclare)s }; @@ -155,19 +172,21 @@ def template MicroOpConstructor {{ } inline %(class_name)s%(signature)s::%(class_name)s( - ExtMachInst machInst %(param_arg_dec)s) : - %(base_class)s(false, false, false, false, - "%(mnemonic)s", machInst, %(op_class)s) + ExtMachInst machInst, const char * instMnem + %(param_arg_dec)s) : + %(base_class)s(machInst, "%(mnemonic)s", instMnem, + false, false, false, false, %(op_class)s) %(param_init)s { buildMe(); } inline %(class_name)s%(signature)s::%(class_name)s( - bool isMicro, bool isDelayed, bool isFirst, bool isLast, - ExtMachInst machInst %(param_arg_dec)s) - : %(base_class)s(isMicro, isDelayed, isFirst, isLast, - "%(mnemonic)s", machInst, %(op_class)s) + ExtMachInst machInst, const char * instMnem, + bool isMicro, bool isDelayed, bool isFirst, bool isLast + %(param_arg_dec)s) + : %(base_class)s(machInst, "%(mnemonic)s", instMnem, + isMicro, isDelayed, isFirst, isLast, %(op_class)s) %(param_init)s { buildMe(); diff --git a/src/arch/x86/isa/microops/microops.isa b/src/arch/x86/isa/microops/microops.isa index bb136fc81..d877152eb 100644 --- a/src/arch/x86/isa/microops/microops.isa +++ b/src/arch/x86/isa/microops/microops.isa @@ -56,5 +56,8 @@ //Common microop stuff ##include "base.isa" +//A microop that generates a specified fault +##include "fault.isa" + //Integer microop definitions ##include "int.isa" |