summaryrefslogtreecommitdiff
path: root/src/arch/x86/isa/microops
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-08-26 20:30:36 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-26 20:30:36 -0700
commitfcd04f953ce56f85da52d916f5770924fedd0297 (patch)
tree14c6cbc305f9fcc3eedeb99c5d79a2ee6c598207 /src/arch/x86/isa/microops
parent24bfda0fdf0d1f80726d8590dcd6a84d70134a53 (diff)
downloadgem5-fcd04f953ce56f85da52d916f5770924fedd0297.tar.xz
X86: Remove x86 code that attempted to fix misaligned accesses.
--HG-- extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
Diffstat (limited to 'src/arch/x86/isa/microops')
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa50
1 files changed, 6 insertions, 44 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 403a1aacf..c979ace04 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -123,19 +123,7 @@ def template MicroLoadExecute {{
%(ea_code)s;
DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
- Twin64_t alignedMem;
- fault = read(xc, EA, alignedMem, 0);
- int offset = EA & (dataSize - 1);
- if(dataSize != 8 || !offset)
- {
- Mem = bits(alignedMem.a,
- (offset + dataSize) * 8 - 1, offset * 8);
- }
- else
- {
- Mem = alignedMem.b << (dataSize - offset) * 8;
- Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
- }
+ fault = read(xc, EA, Mem, 0);
if(fault == NoFault)
{
@@ -162,9 +150,7 @@ def template MicroLoadInitiateAcc {{
%(ea_code)s;
DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
- int offset = EA & (dataSize - 1);
- Twin64_t alignedMem;
- fault = read(xc, EA, alignedMem, offset);
+ fault = read(xc, EA, Mem, 0);
return fault;
}
@@ -180,18 +166,8 @@ def template MicroLoadCompleteAcc {{
%(op_decl)s;
%(op_rd)s;
- Twin64_t alignedMem = pkt->get<Twin64_t>();
- int offset = pkt->req->getFlags();
- if(dataSize != 8 || !offset)
- {
- Mem = bits(alignedMem.a,
- (offset + dataSize) * 8 - 1, offset * 8);
- }
- else
- {
- Mem = alignedMem.b << (dataSize - offset) * 8;
- Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
- }
+ Mem = pkt->get<typeof(Mem)>();
+
%(code)s;
if(fault == NoFault)
@@ -221,14 +197,7 @@ def template MicroStoreExecute {{
if(fault == NoFault)
{
- int offset = EA & (dataSize - 1);
-
- Twin64_t alignedMem;
- alignedMem.a = Mem << (offset * 8);
- alignedMem.b =
- bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);
-
- fault = write(xc, alignedMem, EA, 0);
+ fault = write(xc, Mem, EA, 0);
if(fault == NoFault)
{
%(op_wb)s;
@@ -255,14 +224,7 @@ def template MicroStoreInitiateAcc {{
if(fault == NoFault)
{
- int offset = EA & (dataSize - 1);
-
- Twin64_t alignedMem;
- alignedMem.a = Mem << (offset * 8);
- alignedMem.b =
- bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);
-
- fault = write(xc, alignedMem, EA, 0);
+ fault = write(xc, Mem, EA, 0);
if(fault == NoFault)
{
%(op_wb)s;