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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-29 00:51:34 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-29 00:51:34 -0700 |
| commit | 14a7cda195db9fcc6accca62bf2b8dfdb2218e0e (patch) | |
| tree | 3b60f655c35e373597b5002064f1a208280d0440 /src/arch/x86/isa/operands.isa | |
| parent | 8a674bed5ca845294412f4736f5ac38b42864801 (diff) | |
| parent | 77ce05f47842606169e7575ef82e65da65bd6c6e (diff) | |
| download | gem5-14a7cda195db9fcc6accca62bf2b8dfdb2218e0e.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 849b63ae1300e240082da19dfeb283cdeeb80aef
Diffstat (limited to 'src/arch/x86/isa/operands.isa')
| -rw-r--r-- | src/arch/x86/isa/operands.isa | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/operands.isa b/src/arch/x86/isa/operands.isa index 20376f38f..36b0ee4df 100644 --- a/src/arch/x86/isa/operands.isa +++ b/src/arch/x86/isa/operands.isa @@ -96,7 +96,7 @@ def operand_types {{ }}; def operands {{ - # This is just copied from SPARC, because having no operands confuses - # the parser. - 'Rd': ('IntReg', 'udw', 'RD', 'IsInteger', 1) + 'IntRegOp0': ('IntReg', 'udw', 'regIndex0', 'IsInteger', 1), + 'IntRegOp1': ('IntReg', 'udw', 'regIndex1', 'IsInteger', 2), + 'IntRegOp2': ('IntReg', 'udw', 'regIndex2', 'IsInteger', 2), }}; |