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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-06-19 14:18:46 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-06-19 14:18:46 +0000 |
| commit | 053c715f213a6532b5644e46a5d04ef9e092139e (patch) | |
| tree | 515d9abc887ddbc41431a902b1bf7c7ebb668776 /src/arch/x86/isa/operands.isa | |
| parent | 2d08ab0cc26fc2b03a575f054508abc035786a08 (diff) | |
| parent | 6e286cddfaf6286f96e06c26266070f6fbbd7749 (diff) | |
| download | gem5-053c715f213a6532b5644e46a5d04ef9e092139e.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
Diffstat (limited to 'src/arch/x86/isa/operands.isa')
| -rw-r--r-- | src/arch/x86/isa/operands.isa | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/arch/x86/isa/operands.isa b/src/arch/x86/isa/operands.isa index 1564c23e9..b2ac17d66 100644 --- a/src/arch/x86/isa/operands.isa +++ b/src/arch/x86/isa/operands.isa @@ -99,7 +99,9 @@ def operands {{ 'DestReg': ('IntReg', 'uqw', 'dest', 'IsInteger', 1), 'SrcReg1': ('IntReg', 'uqw', 'src1', 'IsInteger', 2), 'SrcReg2': ('IntReg', 'uqw', 'src2', 'IsInteger', 3), - 'IntRegOp0': ('IntReg', 'udw', 'param0', 'IsInteger', 1), - 'IntRegOp1': ('IntReg', 'udw', 'param1', 'IsInteger', 2), - 'IntRegOp2': ('IntReg', 'udw', 'param2', 'IsInteger', 2), + 'Base': ('IntReg', 'uqw', 'base', 'IsInteger', 4), + 'Index': ('IntReg', 'uqw', 'index', 'IsInteger', 5), + 'Data': ('IntReg', 'uqw', 'data', 'IsInteger', 6), + 'RIP': ('NPC', 'uqw', None, (None, None, 'IsControl'), 10), + 'Mem': ('Mem', 'uqw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 100) }}; |