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authorGabe Black <gblack@eecs.umich.edu>2007-07-23 01:07:49 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-07-23 01:07:49 +0000
commit85f9415a67f3f3b54a615c2e29576235d11428f3 (patch)
tree599f0410465cca36d8b94ebc2a34d5a21501d987 /src/arch/x86/isa/specialize.isa
parent089fce4f59fd0086202e9cf5f7b2a46c6545f7b6 (diff)
downloadgem5-85f9415a67f3f3b54a615c2e29576235d11428f3.tar.xz
Make the operand size reflect the size specifier on the operand tags, and implement NEG
--HG-- extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
Diffstat (limited to 'src/arch/x86/isa/specialize.isa')
-rw-r--r--src/arch/x86/isa/specialize.isa14
1 files changed, 6 insertions, 8 deletions
diff --git a/src/arch/x86/isa/specialize.isa b/src/arch/x86/isa/specialize.isa
index 5165ea206..a45c6e80f 100644
--- a/src/arch/x86/isa/specialize.isa
+++ b/src/arch/x86/isa/specialize.isa
@@ -114,7 +114,8 @@ let {{
self.reg = match.group("reg")
self.tag = match.group("tag")
self.size = match.group("size")
- self.rsize = match.group("rsize")
+ if not self.size:
+ self.size = match.group("rsize")
ModRMRegIndex = "(MODRM_REG | (REX_R << 3))"
ModRMRMIndex = "(MODRM_RM | (REX_B << 3))"
@@ -129,6 +130,10 @@ let {{
opType = OpType(opTypes[0])
opTypes.pop(0)
+ if opType.tag not in ("I", "J"):
+ if opType.size:
+ env.setSize(opType.size)
+
if opType.reg:
#Figure out what to do with fixed register operands
#This is the index to use, so we should stick it some place.
@@ -136,13 +141,6 @@ let {{
env.addReg("INTREG_R%sX | (REX_B << 3)" % opType.reg)
else:
env.addReg("INTREG_R%s | (REX_B << 3)" % opType.reg)
- if opType.size:
- if opType.rsize in ("l", "h", "b"):
- print "byte"
- elif opType.rsize == "x":
- print "word"
- else:
- print "Didn't recognize fixed register size %s!" % opType.rsize
Name += "_R"
elif opType.tag == "B":
# This refers to registers whose index is encoded as part of the opcode