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authorGabe Black <gblack@eecs.umich.edu>2009-08-17 20:15:16 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-08-17 20:15:16 -0700
commitf6b12bfa8dd9e3a0d7e84d59db2142cdda99e086 (patch)
treeb5d21785c5418fc2099249abd7fcc98ff25ca3a9 /src/arch/x86/isa
parent45bae0c70f43dc04ccf485e2ea54b892a072cb0c (diff)
downloadgem5-f6b12bfa8dd9e3a0d7e84d59db2142cdda99e086.tar.xz
X86: Implement a media average microop.
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/microops/mediaop.isa20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index 7e7016368..b771cca83 100644
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -955,6 +955,26 @@ let {{
FpDestReg.uqw = result;
'''
+ class Mavg(MediaOp):
+ code = '''
+ assert(srcSize == destSize);
+ int size = srcSize;
+ int sizeBits = size * 8;
+ int items = (ext & 0x1) ? 1: (sizeof(FloatRegBits) / size);
+ uint64_t result = FpDestReg.uqw;
+
+ for (int i = 0; i < items; i++) {
+ int hiIndex = (i + 1) * sizeBits - 1;
+ int loIndex = (i + 0) * sizeBits;
+ uint64_t arg1Bits = bits(FpSrcReg1.uqw, hiIndex, loIndex);
+ uint64_t arg2Bits = bits(FpSrcReg2.uqw, hiIndex, loIndex);
+ uint64_t resBits = (arg1Bits + arg2Bits + 1) / 2;
+
+ result = insertBits(result, hiIndex, loIndex, resBits);
+ }
+ FpDestReg.uqw = result;
+ '''
+
class Msad(MediaOp):
code = '''
int srcBits = srcSize * 8;