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authorGabe Black <gblack@eecs.umich.edu>2009-11-08 22:49:57 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-11-08 22:49:57 -0800
commit53086dfefe2796497724daaa7d5d1d3d85a8a636 (patch)
tree272efbb65d40cdb97c0e2d1286b58d71a7ce4934 /src/arch/x86/isa
parentb1a1f9aec8a2dcd5fbaa556c96d5cb1eeac4bd38 (diff)
downloadgem5-53086dfefe2796497724daaa7d5d1d3d85a8a636.tar.xz
X86: Make x86 use PREFETCH instead of PF_EXCLUSIVE.
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 912aa3511..afe1ead59 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -157,7 +157,7 @@ def template MicroLoadExecute {{
if (fault == NoFault) {
%(code)s;
- } else if (memFlags & Request::PF_EXCLUSIVE) {
+ } else if (memFlags & Request::PREFETCH) {
// For prefetches, ignore any faults/exceptions.
return NoFault;
}
@@ -374,7 +374,7 @@ let {{
if atCPL0:
self.memFlags += " | (CPL0FlagBit << FlagShift)"
if prefetch:
- self.memFlags += " | Request::PF_EXCLUSIVE"
+ self.memFlags += " | Request::PREFETCH"
self.memFlags += " | (machInst.legacy.addr ? " + \
"(AddrSizeFlagBit << FlagShift) : 0)"