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authorGabe Black <gblack@eecs.umich.edu>2007-09-04 23:23:51 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-09-04 23:23:51 -0700
commit310912cf2ccae3a4e9e3505cc3316d778daa2ec8 (patch)
tree2bba97804ad7d576b8d73da61aaeb61456200f21 /src/arch/x86/isa
parentaaee21afdb39ed1fe02546acfca780881e07d813 (diff)
downloadgem5-310912cf2ccae3a4e9e3505cc3316d778daa2ec8.tar.xz
X86: Fix a typo in the microassembly for the cqo instruction.
--HG-- extra : convert_revision : ddf739e591e4414ade37b806a88f3c11292627e2
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/insts/data_conversion/sign_extension.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/data_conversion/sign_extension.py b/src/arch/x86/isa/insts/data_conversion/sign_extension.py
index 0bdd4036c..9a7c226af 100644
--- a/src/arch/x86/isa/insts/data_conversion/sign_extension.py
+++ b/src/arch/x86/isa/insts/data_conversion/sign_extension.py
@@ -62,6 +62,6 @@ def macroop CQO_R_R {
# A shift might be slower than, for example, an explicit sign extension,
# so it might be worthwhile to try to find an alternative.
mov regm, regm, reg
- sra regm, regm, "env.dataSize * 8 - 1"
+ srai regm, regm, "env.dataSize * 8 - 1"
};
'''