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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-09-19 02:40:19 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-09-19 02:40:19 -0700 |
| commit | 83aa47adca17be33d53da6734ea422e1e0e2a07c (patch) | |
| tree | 7241093033fd9d6e07ac30d7439f0589b7a25642 /src/arch/x86/isa | |
| parent | 9eda6b1d88a4bdd466964065dd6009bdcedfcb92 (diff) | |
| download | gem5-83aa47adca17be33d53da6734ea422e1e0e2a07c.tar.xz | |
PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts.
Diffstat (limited to 'src/arch/x86/isa')
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 8 | ||||
| -rw-r--r-- | src/arch/x86/isa/includes.isa | 4 |
2 files changed, 0 insertions, 12 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index f856f2d37..e4df4ac66 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -136,7 +136,6 @@ //0x04: loadall_or_reset_or_hang(); 0x4: decode IMMEDIATE { format BasicOperate { -#if FULL_SYSTEM 0x00: m5arm({{ PseudoInst::arm(xc->tcBase()); }}, IsNonSpeculative); @@ -152,21 +151,18 @@ 0x04: m5quiesceTime({{ Rax = PseudoInst::quiesceTime(xc->tcBase()); }}, IsNonSpeculative); -#endif 0x07: m5rpns({{ Rax = PseudoInst::rpns(xc->tcBase()); }}, IsNonSpeculative); 0x21: m5exit({{ PseudoInst::m5exit(xc->tcBase(), Rdi); }}, IsNonSpeculative); -#if FULL_SYSTEM 0x30: m5initparam({{ Rax = PseudoInst::initParam(xc->tcBase()); }}, IsNonSpeculative); 0x31: m5loadsymbol({{ PseudoInst::loadsymbol(xc->tcBase()); }}, IsNonSpeculative); -#endif 0x40: m5resetstats({{ PseudoInst::resetstats(xc->tcBase(), Rdi, Rsi); }}, IsNonSpeculative); @@ -179,23 +175,19 @@ 0x43: m5checkpoint({{ PseudoInst::m5checkpoint(xc->tcBase(), Rdi, Rsi); }}, IsNonSpeculative); -#if FULL_SYSTEM 0x50: m5readfile({{ Rax = PseudoInst::readfile( xc->tcBase(), Rdi, Rsi, Rdx); }}, IsNonSpeculative); -#endif 0x51: m5debugbreak({{ PseudoInst::debugbreak(xc->tcBase()); }}, IsNonSpeculative); 0x52: m5switchcpu({{ PseudoInst::switchcpu(xc->tcBase()); }}, IsNonSpeculative); -#if FULL_SYSTEM 0x53: m5addsymbol({{ PseudoInst::addsymbol(xc->tcBase(), Rdi, Rsi); }}, IsNonSpeculative); -#endif 0x54: m5panic({{ panic("M5 panic instruction called at pc = %#x.\n", RIP); diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa index dc8abbc66..237b29877 100644 --- a/src/arch/x86/isa/includes.isa +++ b/src/arch/x86/isa/includes.isa @@ -102,10 +102,6 @@ output exec {{ #include <ieeefp.h> #endif -#if FULL_SYSTEM -#include "sim/pseudo_inst.hh" -#endif - #include <cmath> #include <limits> |