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author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-27 18:50:52 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-27 18:50:52 -0600 |
commit | 5be0b846b1ca0131fc6c67c1ff7dcf64791ebc73 (patch) | |
tree | 237af620be866ac41bc92877057f3731d408c84b /src/arch/x86/isa | |
parent | 4eb3b1ed0b0cb5182d92fd56c21b5ca003c0fda5 (diff) | |
download | gem5-5be0b846b1ca0131fc6c67c1ff7dcf64791ebc73.tar.xz |
x86: implements fxch instruction.
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r-- | src/arch/x86/isa/decoder/x87.isa | 12 | ||||
-rw-r--r-- | src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py | 17 |
2 files changed, 25 insertions, 4 deletions
diff --git a/src/arch/x86/isa/decoder/x87.isa b/src/arch/x86/isa/decoder/x87.isa index ac1306412..61f125e7c 100644 --- a/src/arch/x86/isa/decoder/x87.isa +++ b/src/arch/x86/isa/decoder/x87.isa @@ -59,7 +59,7 @@ format WarnUnimpl { default: Inst::FLD(Md); } 0x1: decode MODRM_MOD { - 0x3: fxch(); + 0x3: Inst::FXCH(Eq); default: Inst::UD2(); } 0x2: decode MODRM_MOD { @@ -240,8 +240,14 @@ format WarnUnimpl { 0x3: Inst::UD2(); default: fisttp(); } - 0x2: Inst::FST(Eq); - 0x3: Inst::FSTP(Eq); + 0x2: decode MODRM_MOD { + 0x3: Inst::FST(Eq); + default: Inst::FST(Mq); + } + 0x3: decode MODRM_MOD { + 0x3: Inst::FSTP(Eq); + default: Inst::FSTP(Mq); + } 0x4: decode MODRM_MOD { 0x3: fucom(); default: frstor(); diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py index 982ac8e55..b6fbb01cc 100644 --- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py +++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py @@ -36,5 +36,20 @@ # Authors: Gabe Black microcode = ''' -# FXCH +def macroop FXCH_R +{ + movfp ufp1, sti + movfp sti, st(0) + movfp st(0), ufp1 +}; + +def macroop FXCH_M +{ + fault "new UnimpInstFault" +}; + +def macroop FXCH_P +{ + fault "new UnimpInstFault" +}; ''' |