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authorGabe Black <gblack@eecs.umich.edu>2009-04-19 04:56:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-04-19 04:56:14 -0700
commit789b3191b93dc78713c0ae80e592b4d2c43676d8 (patch)
treee39136e13dacc2139c53424982af3700be8672cd /src/arch/x86/isa
parente742cad6f4363e242e17c516f49edee051340924 (diff)
downloadgem5-789b3191b93dc78713c0ae80e592b4d2c43676d8.tar.xz
X86: Implement a locking version of AND.
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/insts/general_purpose/logical.py32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/logical.py b/src/arch/x86/isa/insts/general_purpose/logical.py
index ef860215c..97b09fb01 100644
--- a/src/arch/x86/isa/insts/general_purpose/logical.py
+++ b/src/arch/x86/isa/insts/general_purpose/logical.py
@@ -239,6 +239,23 @@ def macroop AND_P_I
st t2, seg, riprel, disp
};
+def macroop AND_LOCKED_M_I
+{
+ ldstl t2, seg, sib, disp
+ limm t1, imm
+ and t2, t2, t1, flags=(OF,SF,ZF,PF,CF)
+ stul t2, seg, sib, disp
+};
+
+def macroop AND_LOCKED_P_I
+{
+ rdip t7
+ ldstl t2, seg, riprel, disp
+ limm t1, imm
+ and t2, t2, t1, flags=(OF,SF,ZF,PF,CF)
+ stul t2, seg, riprel, disp
+};
+
def macroop AND_M_R
{
ldst t1, seg, sib, disp
@@ -254,6 +271,21 @@ def macroop AND_P_R
st t1, seg, riprel, disp
};
+def macroop AND_LOCKED_M_R
+{
+ ldstl t1, seg, sib, disp
+ and t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
+ stul t1, seg, sib, disp
+};
+
+def macroop AND_LOCKED_P_R
+{
+ rdip t7
+ ldstl t1, seg, riprel, disp
+ and t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
+ stul t1, seg, riprel, disp
+};
+
def macroop NOT_R
{
limm t1, -1