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authorGabe Black <gabeblack@google.com>2017-11-02 01:58:38 -0700
committerGabe Black <gabeblack@google.com>2017-11-02 09:43:35 +0000
commit8be75f49fd37712e7cf04c0853bb7504f69a04d6 (patch)
treef791cd8adccee52d054f5a10b62948021a3d121b /src/arch/x86/isa
parent97c68e8fc56baa39ce7901ac1f73d2ff79b550f2 (diff)
downloadgem5-8be75f49fd37712e7cf04c0853bb7504f69a04d6.tar.xz
alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.
The ISA parser used to generate different copies of exec functions for each exec context class a particular CPU wanted to use. That's since been changed so that those functions take a pointer to the base ExecContext, so the code which would generate those extra functions can be removed, and some functions which used to be templated on an ExecContext subclass can be untemplated, or minimally less templated. Now that some functions aren't going to be instantiated multiple times with different signatures, there are also opportunities to collapse templates and make many instruction definitions simpler within the parser. Since those changes will be less mechanical, they're left for later changes and will probably be done in smaller increments. Change-Id: I0015307bb02dfb9c60380b56d2a820f12169ebea Reviewed-on: https://gem5-review.googlesource.com/5381 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/formats/basic.isa6
-rw-r--r--src/arch/x86/isa/formats/cpuid.isa2
-rw-r--r--src/arch/x86/isa/formats/monitor_mwait.isa11
-rw-r--r--src/arch/x86/isa/formats/nop.isa2
-rw-r--r--src/arch/x86/isa/formats/syscall.isa2
-rw-r--r--src/arch/x86/isa/formats/unimp.isa4
-rw-r--r--src/arch/x86/isa/formats/unknown.isa2
-rw-r--r--src/arch/x86/isa/macroop.isa2
-rw-r--r--src/arch/x86/isa/microops/debug.isa2
-rw-r--r--src/arch/x86/isa/microops/fpop.isa2
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa21
-rw-r--r--src/arch/x86/isa/microops/limmop.isa2
-rw-r--r--src/arch/x86/isa/microops/mediaop.isa2
-rw-r--r--src/arch/x86/isa/microops/regop.isa4
-rw-r--r--src/arch/x86/isa/microops/seqop.isa2
-rw-r--r--src/arch/x86/isa/microops/specop.isa5
16 files changed, 34 insertions, 37 deletions
diff --git a/src/arch/x86/isa/formats/basic.isa b/src/arch/x86/isa/formats/basic.isa
index a4b96c43e..af540962b 100644
--- a/src/arch/x86/isa/formats/basic.isa
+++ b/src/arch/x86/isa/formats/basic.isa
@@ -40,12 +40,12 @@
// Declarations for execute() methods.
def template BasicExecDeclare {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
}};
// Definitions of execute methods that panic.
def template BasicExecPanic {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
+ Fault execute(ExecContext *, Trace::InstRecord *) const
{
panic("Execute method called when it shouldn't!");
M5_DUMMY_RETURN
@@ -77,7 +77,7 @@ def template BasicConstructor {{
// Basic instruction class execute method template.
def template BasicExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/x86/isa/formats/cpuid.isa b/src/arch/x86/isa/formats/cpuid.isa
index 265d0f7ef..63ba4cf4e 100644
--- a/src/arch/x86/isa/formats/cpuid.isa
+++ b/src/arch/x86/isa/formats/cpuid.isa
@@ -68,7 +68,7 @@ output decoder {{
}};
def template CPUIDExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
// If the CPUID instruction used a valid function number, this will
diff --git a/src/arch/x86/isa/formats/monitor_mwait.isa b/src/arch/x86/isa/formats/monitor_mwait.isa
index c901ceded..5e68b8738 100644
--- a/src/arch/x86/isa/formats/monitor_mwait.isa
+++ b/src/arch/x86/isa/formats/monitor_mwait.isa
@@ -47,10 +47,9 @@ def format MonitorInst(code, *opt_flags) {{
// Declarations for execute() methods.
def template MwaitExecDeclare {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
- Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
- Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
- Trace::InstRecord *) const;
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
}};
def template MwaitDeclare {{
@@ -64,7 +63,7 @@ def template MwaitDeclare {{
}};
def template MwaitInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
unsigned s = 0x8; //size
@@ -75,7 +74,7 @@ def template MwaitInitiateAcc {{
}};
def template MwaitCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
Trace::InstRecord *traceData) const
{
MicroHalt hltObj(machInst, mnemonic, 0x0);
diff --git a/src/arch/x86/isa/formats/nop.isa b/src/arch/x86/isa/formats/nop.isa
index d33529faa..4d8448b36 100644
--- a/src/arch/x86/isa/formats/nop.isa
+++ b/src/arch/x86/isa/formats/nop.isa
@@ -72,7 +72,7 @@ output decoder {{
}};
def template NopExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
return NoFault;
diff --git a/src/arch/x86/isa/formats/syscall.isa b/src/arch/x86/isa/formats/syscall.isa
index 6888af02c..1a47b3ea9 100644
--- a/src/arch/x86/isa/formats/syscall.isa
+++ b/src/arch/x86/isa/formats/syscall.isa
@@ -74,7 +74,7 @@ output decoder {{
}};
def template SyscallExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/x86/isa/formats/unimp.isa b/src/arch/x86/isa/formats/unimp.isa
index 7849a4970..ee0600dfd 100644
--- a/src/arch/x86/isa/formats/unimp.isa
+++ b/src/arch/x86/isa/formats/unimp.isa
@@ -122,7 +122,7 @@ output decoder {{
output exec {{
Fault
- FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
+ FailUnimplemented::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
panic("attempt to execute unimplemented instruction '%s' %s",
@@ -131,7 +131,7 @@ output exec {{
}
Fault
- WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
+ WarnUnimplemented::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
if (!warned) {
diff --git a/src/arch/x86/isa/formats/unknown.isa b/src/arch/x86/isa/formats/unknown.isa
index 585ff1ed5..769ffb7b8 100644
--- a/src/arch/x86/isa/formats/unknown.isa
+++ b/src/arch/x86/isa/formats/unknown.isa
@@ -74,7 +74,7 @@ output decoder {{
}};
output exec {{
- Fault Unknown::execute(CPU_EXEC_CONTEXT *xc,
+ Fault Unknown::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
return std::make_shared<InvalidOpcode>();
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index 818cfc3ea..99faa2e03 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -44,7 +44,7 @@
// Execute method for macroops.
def template MacroExecPanic {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
+ Fault execute(ExecContext *, Trace::InstRecord *) const
{
panic("Tried to execute macroop directly!");
return NoFault;
diff --git a/src/arch/x86/isa/microops/debug.isa b/src/arch/x86/isa/microops/debug.isa
index b14202ac5..87e7879f1 100644
--- a/src/arch/x86/isa/microops/debug.isa
+++ b/src/arch/x86/isa/microops/debug.isa
@@ -84,7 +84,7 @@ def template MicroDebugDeclare {{
def template MicroDebugExecute {{
Fault
- %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s
diff --git a/src/arch/x86/isa/microops/fpop.isa b/src/arch/x86/isa/microops/fpop.isa
index 6ba292977..5973c7d06 100644
--- a/src/arch/x86/isa/microops/fpop.isa
+++ b/src/arch/x86/isa/microops/fpop.isa
@@ -46,7 +46,7 @@
//////////////////////////////////////////////////////////////////////////
def template MicroFpOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 6dd2b6f6b..2f1c267a2 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -48,7 +48,7 @@
// LEA template
def template MicroLeaExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -88,7 +88,7 @@ def template MicroLeaDeclare {{
// Load templates
def template MicroLoadExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -118,7 +118,7 @@ def template MicroLoadExecute {{
}};
def template MicroLoadInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -137,9 +137,8 @@ def template MicroLoadInitiateAcc {{
}};
def template MicroLoadCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr pkt,
- CPU_EXEC_CONTEXT * xc,
- Trace::InstRecord * traceData) const
+ Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext * xc,
+ Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -162,7 +161,7 @@ def template MicroLoadCompleteAcc {{
// Store templates
def template MicroStoreExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::execute(ExecContext * xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -190,7 +189,7 @@ def template MicroStoreExecute {{
}};
def template MicroStoreInitiateAcc {{
- Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
+ Fault %(class_name)s::initiateAcc(ExecContext * xc,
Trace::InstRecord * traceData) const
{
Fault fault = NoFault;
@@ -214,7 +213,7 @@ def template MicroStoreInitiateAcc {{
def template MicroStoreCompleteAcc {{
Fault %(class_name)s::completeAcc(PacketPtr pkt,
- CPU_EXEC_CONTEXT * xc, Trace::InstRecord * traceData) const
+ ExecContext * xc, Trace::InstRecord * traceData) const
{
%(op_decl)s;
%(op_rd)s;
@@ -228,12 +227,12 @@ def template MicroStoreCompleteAcc {{
//This delcares the initiateAcc function in memory operations
def template InitiateAccDeclare {{
- Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
}};
//This declares the completeAcc function in memory operations
def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
}};
def template MicroLdStOpDeclare {{
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index c002a1684..ac0438ae0 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -42,7 +42,7 @@
//////////////////////////////////////////////////////////////////////////
def template MicroLimmOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s;
diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index 63e22a23f..19bbc6392 100644
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -29,7 +29,7 @@
// Authors: Gabe Black
def template MediaOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index dc5f0affe..2f8fc4dfc 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -42,7 +42,7 @@
//////////////////////////////////////////////////////////////////////////
def template MicroRegOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
@@ -73,7 +73,7 @@ def template MicroRegOpExecute {{
}};
def template MicroRegOpImmExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
Fault fault = NoFault;
diff --git a/src/arch/x86/isa/microops/seqop.isa b/src/arch/x86/isa/microops/seqop.isa
index 76766e055..601aa6775 100644
--- a/src/arch/x86/isa/microops/seqop.isa
+++ b/src/arch/x86/isa/microops/seqop.isa
@@ -68,7 +68,7 @@ def template SeqOpDeclare {{
}};
def template SeqOpExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s;
diff --git a/src/arch/x86/isa/microops/specop.isa b/src/arch/x86/isa/microops/specop.isa
index 77c459097..2b1d8ba44 100644
--- a/src/arch/x86/isa/microops/specop.isa
+++ b/src/arch/x86/isa/microops/specop.isa
@@ -88,7 +88,7 @@ def template MicroFaultDeclare {{
}};
def template MicroFaultExecute {{
- Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
+ Fault %(class_name)s::execute(ExecContext *xc,
Trace::InstRecord *traceData) const
{
%(op_decl)s;
@@ -104,8 +104,7 @@ def template MicroFaultExecute {{
output exec {{
Fault
- MicroHalt::execute(CPU_EXEC_CONTEXT *xc,
- Trace::InstRecord * traceData) const
+ MicroHalt::execute(ExecContext *xc, Trace::InstRecord * traceData) const
{
xc->tcBase()->suspend();
return NoFault;