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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:37:41 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-26 20:37:41 -0700 |
| commit | 9c99f5f825a3440ce8efef2e31f801527c5939d6 (patch) | |
| tree | 262193081688494ee0fe9fb5de702a4d6c5c1d3f /src/arch/x86/isa | |
| parent | 506bf83595d0f941ade9e55a192c1d831fc4c90c (diff) | |
| download | gem5-9c99f5f825a3440ce8efef2e31f801527c5939d6.tar.xz | |
X86: Fix the sign extension microop so it extends zeros correctly.
--HG--
extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
Diffstat (limited to 'src/arch/x86/isa')
| -rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 608b86a70..b91c77c21 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -661,8 +661,10 @@ let {{ defineMicroRegOpImm('Sext', ''' IntReg val = psrc1; int sign_bit = bits(val, imm8-1, imm8-1); - val = sign_bit ? (val | ~mask(imm8)) : val; - DestReg = merge(DestReg, val, dataSize);''') + uint64_t maskVal = mask(imm8); + val = sign_bit ? (val | ~maskVal) : (val & maskVal); + DestReg = merge(DestReg, val, dataSize); + ''') defineMicroRegOpImm('Zext', 'DestReg = bits(psrc1, imm8-1, 0);') }}; |