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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:08:40 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-19 03:08:40 -0700 |
| commit | 27e54982b40cda334f03d4f4c13a19df028b884b (patch) | |
| tree | f89007da3cc1b5d74fee2491f1c1e6c3775ca9e0 /src/arch/x86/isa | |
| parent | 633c96bd85e856dea174fd325f8a297413eb6a9c (diff) | |
| download | gem5-27e54982b40cda334f03d4f4c13a19df028b884b.tar.xz | |
X86: Fix the mov to segment selector in real mode instruction microcode.
Diffstat (limited to 'src/arch/x86/isa')
| -rw-r--r-- | src/arch/x86/isa/insts/general_purpose/data_transfer/move.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py index 60c046d04..560a86e64 100644 --- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py +++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py @@ -228,7 +228,7 @@ def macroop MOV_P_S { def macroop MOV_REAL_S_R { zexti t2, regm, 15, dataSize=8 - slli t3, t2, 2, dataSize=8 + slli t3, t2, 4, dataSize=8 wrsel reg, regm wrbase reg, t3 }; @@ -236,7 +236,7 @@ def macroop MOV_REAL_S_R { def macroop MOV_REAL_S_M { ld t1, seg, sib, disp, dataSize=2 zexti t2, t1, 15, dataSize=8 - slli t3, t2, 2, dataSize=8 + slli t3, t2, 4, dataSize=8 wrsel reg, t1 wrbase reg, t3 }; |