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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-17 15:27:28 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-17 15:27:28 -0700 |
| commit | bbf7163dd9a9c2a17cb8873f7620f2b17841ac26 (patch) | |
| tree | 82f57db0789d8d79c144a728e0044db3bf30d08e /src/arch/x86/isa | |
| parent | cbc24d66001dbe3ec85f82073048d62141af2fd4 (diff) | |
| download | gem5-bbf7163dd9a9c2a17cb8873f7620f2b17841ac26.tar.xz | |
Add symbols for each of the flags a microop could set and each condition it could check.
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
Diffstat (limited to 'src/arch/x86/isa')
| -rw-r--r-- | src/arch/x86/isa/microasm.isa | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index afe8ae64c..213468b0b 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -96,6 +96,19 @@ let {{ assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() assembler.symbols.update(symbols) + for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'): + assembler.symbols[flag] = flag + "Bit" + + for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF', + 'MSTRZ', 'STRZ', 'MSTRC', 'STRZnZF', + 'OF', 'CF', 'ZF', 'CvZF', + 'SF', 'PF', 'SxOF', 'SxOvZF'): + assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond + assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond + + assembler.symbols["CTrue"] = "ConditionTests::True" + assembler.symbols["CFalse"] = "ConditionTests::False" + # Code literal which forces a default 64 bit operand size in 64 bit mode. assembler.symbols["oszIn64Override"] = ''' if (machInst.mode.submode == SixtyFourBitMode && |