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author | Gabe Black <gblack@eecs.umich.edu> | 2007-09-19 18:26:42 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-09-19 18:26:42 -0700 |
commit | f3f3747431e001dc6c80da5b6489516b610c22d6 (patch) | |
tree | 24fcbc928df1619a82dbfd9ffa6d6f6809f509f6 /src/arch/x86/isa | |
parent | a54ae9f92b6000e8aaf5e056deaead8725c25a74 (diff) | |
download | gem5-f3f3747431e001dc6c80da5b6489516b610c22d6.tar.xz |
X86: Put in the foundation for x87 stack based fp registers.
--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r-- | src/arch/x86/isa/microasm.isa | 5 | ||||
-rw-r--r-- | src/arch/x86/isa/operands.isa | 3 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 579909506..e961cc63c 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -136,5 +136,10 @@ let {{ assembler.symbols["label"] = labeler + def stack_index(index): + return "(NUM_FLOATREGS + (%s))" % index + + assembler.symbols["st"] = stack_index + macroopDict = assembler.assemble(microcode) }}; diff --git a/src/arch/x86/isa/operands.isa b/src/arch/x86/isa/operands.isa index 7b0427b44..05a9f4418 100644 --- a/src/arch/x86/isa/operands.isa +++ b/src/arch/x86/isa/operands.isa @@ -115,6 +115,9 @@ def operands {{ 'uIP': ('UPC', 'uqw', None, (None, None, 'IsControl'), 51), 'nuIP': ('NUPC', 'uqw', None, (None, None, 'IsControl'), 52), 'ccFlagBits': ('IntReg', 'uqw', 'INTREG_PSEUDO(0)', None, 60), + # The TOP register should needs to be more protected so that later + # instructions don't map their indexes with an old value. + 'TOP': ('ControlReg', 'ub', 'MISCREG_X87_TOP', None, 61), 'SegBase': ('ControlReg', 'uqw', 'MISCREG_SEG_BASE(segment)', (None, None, ['IsSerializeAfter','IsSerializing','IsNonSpeculative']), 70), 'Mem': ('Mem', 'uqw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 100) }}; |