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authorSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:20 -0800
committerSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:20 -0800
commit5200e04e92b487181d4a678231564272730e04a2 (patch)
tree83a8a71c6dffa7a58a5f10c3232022ce2a4741ff /src/arch/x86/isa
parentf5343df1e1999e66c39b95085b77b547e7d94262 (diff)
downloadgem5-5200e04e92b487181d4a678231564272730e04a2.tar.xz
arch, x86: add support for arrays as memory operands
Although the cache models support wider accesses, the ISA descriptions assume that (for the most part) memory operands are integer types, which makes it difficult to define instructions that do memory accesses larger than 64 bits. This patch adds some generic support for memory operands that are arrays of uint64_t, and specifically a 'u2qw' operand type for x86 that is an array of 2 uint64_ts (128 bits). This support is unused at this point, but will be needed shortly for cmpxchg16b. Ideally the 128-bit SSE memory accesses will also be rewritten to use this support. Support for 128-bit accesses could also have been added using the gcc __int128_t extension, which would have been less disruptive. However, although clang also supports __int128_t, it's still non-standard. Also, more importantly, this approach creates a path to defining 256- and 512-byte operands as well, which will be useful for eventual AVX support.
Diffstat (limited to 'src/arch/x86/isa')
-rw-r--r--src/arch/x86/isa/includes.isa1
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa2
-rw-r--r--src/arch/x86/isa/operands.isa2
3 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/x86/isa/includes.isa b/src/arch/x86/isa/includes.isa
index 43565fda5..0d0c0de3e 100644
--- a/src/arch/x86/isa/includes.isa
+++ b/src/arch/x86/isa/includes.isa
@@ -49,6 +49,7 @@ let {{
}};
output header {{
+#include <array>
#include <cstring>
#include <iostream>
#include <sstream>
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index fa8bc6f2b..b35954439 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -143,7 +143,7 @@ def template MicroLoadCompleteAcc {{
%(op_decl)s;
%(op_rd)s;
- Mem = getMem(pkt, dataSize, traceData);
+ getMem(pkt, Mem, dataSize, traceData);
%(code)s;
diff --git a/src/arch/x86/isa/operands.isa b/src/arch/x86/isa/operands.isa
index 59adada13..baa8552e0 100644
--- a/src/arch/x86/isa/operands.isa
+++ b/src/arch/x86/isa/operands.isa
@@ -1,4 +1,5 @@
// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
+// Copyright (c) 2015 Advanced Micro Devices, Inc.
// All rights reserved.
//
// The license below extends only to copyright in the software and shall
@@ -49,6 +50,7 @@ def operand_types {{
'udw' : 'uint32_t',
'sqw' : 'int64_t',
'uqw' : 'uint64_t',
+ 'u2qw' : 'std::array<uint64_t, 2>',
'sf' : 'float',
'df' : 'double',
}};