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authorGabe Black <gblack@eecs.umich.edu>2007-06-19 14:18:46 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-06-19 14:18:46 +0000
commit053c715f213a6532b5644e46a5d04ef9e092139e (patch)
tree515d9abc887ddbc41431a902b1bf7c7ebb668776 /src/arch/x86/isa_traits.hh
parent2d08ab0cc26fc2b03a575f054508abc035786a08 (diff)
parent6e286cddfaf6286f96e06c26266070f6fbbd7749 (diff)
downloadgem5-053c715f213a6532b5644e46a5d04ef9e092139e.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
Diffstat (limited to 'src/arch/x86/isa_traits.hh')
-rw-r--r--src/arch/x86/isa_traits.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 7aba6248a..4c02ee35e 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -93,7 +93,7 @@ namespace X86ISA
// semantically meaningful register indices
//There is no such register in X86
- const int ZeroReg = 0;
+ const int ZeroReg = NUM_INTREGS;
const int StackPointerReg = INTREG_RSP;
//X86 doesn't seem to have a link register
const int ReturnAddressReg = 0;