Merge python and x86 changes with cache branch

--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233

1 files changed, 11 insertions, 6 deletions

diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 4c02ee35e..63bcfead9 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -99,12 +99,17 @@ namespace X86ISA
     const int ReturnAddressReg = 0;
     const int ReturnValueReg = INTREG_RAX;
     const int FramePointerReg = INTREG_RBP;
-    const int ArgumentReg0 = INTREG_RDI;
-    const int ArgumentReg1 = INTREG_RSI;
-    const int ArgumentReg2 = INTREG_RDX;
-    const int ArgumentReg3 = INTREG_RCX;
-    const int ArgumentReg4 = INTREG_R8W;
-    const int ArgumentReg5 = INTREG_R9W;
+    const int ArgumentReg[] = {
+        INTREG_RDI,
+        INTREG_RSI,
+        INTREG_RDX,
+        //This argument register is r10 for syscalls and rcx for C.
+        INTREG_R10W,
+        //INTREG_RCX,
+        INTREG_R8W,
+        INTREG_R9W
+    };
+    const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
 
     // Some OS syscalls use a second register (rdx) to return a second
     // value