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| author | Andreas Sandberg <andreas@sandberg.pp.se> | 2014-03-03 14:44:57 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2014-03-03 14:44:57 +0100 |
| commit | be246cef6251113ad25f59cfef37b746c80b11c5 (patch) | |
| tree | 69f072c0f332de811706fa95c49f233d2f65f79d /src/arch/x86/locked_mem.hh | |
| parent | e7d230ede0deb239271a25d227a792ae615daee2 (diff) | |
| download | gem5-be246cef6251113ad25f59cfef37b746c80b11c5.tar.xz | |
x86: Setup correct TSL/TR segment attributes on INIT
The TSL/LDT & TR/TSS segments didn't contain valid attributes. This
caused problems when transfering the state into KVM where invalid
state is a no-go. Fixup the attributes with values from AMD's
architecture programmer's manual.
Diffstat (limited to 'src/arch/x86/locked_mem.hh')
0 files changed, 0 insertions, 0 deletions