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authorGabe Black <gblack@eecs.umich.edu>2007-03-05 16:08:18 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-05 16:08:18 +0000
commit05ba90b7268089cab46f35c7808502055c18c4d7 (patch)
treea1a7689fb42d2a19c8f0d87af1e3310340fe3d95 /src/arch/x86/locked_mem.hh
parent58d30df67607d896c64689a27780729062c6d302 (diff)
downloadgem5-05ba90b7268089cab46f35c7808502055c18c4d7.tar.xz
Stub implementation for x86
--HG-- extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
Diffstat (limited to 'src/arch/x86/locked_mem.hh')
-rw-r--r--src/arch/x86/locked_mem.hh20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/arch/x86/locked_mem.hh b/src/arch/x86/locked_mem.hh
index c8c10a658..e1d289ee9 100644
--- a/src/arch/x86/locked_mem.hh
+++ b/src/arch/x86/locked_mem.hh
@@ -31,10 +31,28 @@
#ifndef __ARCH_X86_LOCKEDMEM_HH__
#define __ARCH_X86_LOCKEDMEM_HH__
-#error X86 is not yet supported!
+/**
+ * @file
+ *
+ * ISA-specific helper functions for locked memory accesses.
+ */
+
+#include "mem/request.hh"
namespace X86ISA
{
+ template <class XC>
+ inline void
+ handleLockedRead(XC *xc, Request *req)
+ {
+ }
+
+ template <class XC>
+ inline bool
+ handleLockedWrite(XC *xc, Request *req)
+ {
+ return true;
+ }
};
#endif // __ARCH_X86_LOCKEDMEM_HH__