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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-04 20:12:54 -0700 |
| commit | e410a925df8d37f386c97dc7cdd9a78347ce4700 (patch) | |
| tree | b4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/miscregfile.cc | |
| parent | ced6cbcccf4540358093f060dad4d59ad6557d6a (diff) | |
| download | gem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz | |
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.
--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/miscregfile.cc')
| -rw-r--r-- | src/arch/x86/miscregfile.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/x86/miscregfile.cc b/src/arch/x86/miscregfile.cc index 9d8e94061..e2c39c7cd 100644 --- a/src/arch/x86/miscregfile.cc +++ b/src/arch/x86/miscregfile.cc @@ -127,7 +127,6 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg) MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc) { - warn("No miscreg effects implemented yet!\n"); return readRegNoEffect(miscReg); } @@ -155,7 +154,6 @@ void MiscRegFile::setRegNoEffect(int miscReg, const MiscReg &val) void MiscRegFile::setReg(int miscReg, const MiscReg &val, ThreadContext * tc) { - warn("No miscreg effects implemented yet!\n"); setRegNoEffect(miscReg, val); } |