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authorGabe Black <gblack@eecs.umich.edu>2007-07-18 16:12:39 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-18 16:12:39 -0700
commit387f00e3ddf43f57fbca50657b698322421bf678 (patch)
tree74e60057557ee78f38f7ac3dc46de720ee197fb2 /src/arch/x86/miscregfile.cc
parent5cca5ca3d9e5fffb284d5ffd3fc21de147f2f1d3 (diff)
downloadgem5-387f00e3ddf43f57fbca50657b698322421bf678.tar.xz
Fill out the miscreg file and add types to miscregs.hh
--HG-- extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
Diffstat (limited to 'src/arch/x86/miscregfile.cc')
-rw-r--r--src/arch/x86/miscregfile.cc47
1 files changed, 41 insertions, 6 deletions
diff --git a/src/arch/x86/miscregfile.cc b/src/arch/x86/miscregfile.cc
index 14ba3c7cc..9d8e94061 100644
--- a/src/arch/x86/miscregfile.cc
+++ b/src/arch/x86/miscregfile.cc
@@ -86,6 +86,7 @@
*/
#include "arch/x86/miscregfile.hh"
+#include "sim/serialize.hh"
using namespace X86ISA;
using namespace std;
@@ -105,31 +106,65 @@ void MiscRegFile::clear()
MiscReg MiscRegFile::readRegNoEffect(int miscReg)
{
- panic("No misc registers in x86 yet!\n");
+ switch(miscReg)
+ {
+ case MISCREG_CR1:
+ case MISCREG_CR5:
+ case MISCREG_CR6:
+ case MISCREG_CR7:
+ case MISCREG_CR9:
+ case MISCREG_CR10:
+ case MISCREG_CR11:
+ case MISCREG_CR12:
+ case MISCREG_CR13:
+ case MISCREG_CR14:
+ case MISCREG_CR15:
+ panic("Tried to read invalid control register %d\n", miscReg);
+ break;
+ }
+ return regVal[miscReg];
}
MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
{
- panic("No misc registers in x86 yet!\n");
+ warn("No miscreg effects implemented yet!\n");
+ return readRegNoEffect(miscReg);
}
void MiscRegFile::setRegNoEffect(int miscReg, const MiscReg &val)
{
- panic("No misc registers in x86 yet!\n");
+ switch(miscReg)
+ {
+ case MISCREG_CR1:
+ case MISCREG_CR5:
+ case MISCREG_CR6:
+ case MISCREG_CR7:
+ case MISCREG_CR9:
+ case MISCREG_CR10:
+ case MISCREG_CR11:
+ case MISCREG_CR12:
+ case MISCREG_CR13:
+ case MISCREG_CR14:
+ case MISCREG_CR15:
+ panic("Tried to write invalid control register %d\n", miscReg);
+ break;
+ }
+ regVal[miscReg] = val;
}
void MiscRegFile::setReg(int miscReg,
const MiscReg &val, ThreadContext * tc)
{
- panic("No misc registers in x86 yet!\n");
+ warn("No miscreg effects implemented yet!\n");
+ setRegNoEffect(miscReg, val);
}
void MiscRegFile::serialize(std::ostream & os)
{
- panic("No misc registers in x86 yet!\n");
+ SERIALIZE_ARRAY(regVal, NumMiscRegs);
}
void MiscRegFile::unserialize(Checkpoint * cp, const std::string & section)
{
- panic("No misc registers in x86 yet!\n");
+ UNSERIALIZE_ARRAY(regVal, NumMiscRegs);
}