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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:10:42 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-07 18:10:42 -0700 |
| commit | 63a6d7376b539d7da7143217f936b4ee4f984b26 (patch) | |
| tree | 66c8622dbf944dea09a8146f03573d4a803576ee /src/arch/x86/miscregs.hh | |
| parent | 304e4c932af494503ead9395eb08dc8fed1efa9f (diff) | |
| download | gem5-63a6d7376b539d7da7143217f936b4ee4f984b26.tar.xz | |
X86: Make initCPU and startupCPU do something basic.
--HG--
extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
Diffstat (limited to 'src/arch/x86/miscregs.hh')
| -rw-r--r-- | src/arch/x86/miscregs.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/x86/miscregs.hh b/src/arch/x86/miscregs.hh index 8080bd90b..15932f92c 100644 --- a/src/arch/x86/miscregs.hh +++ b/src/arch/x86/miscregs.hh @@ -117,6 +117,9 @@ namespace X86ISA // Flags register MISCREG_RFLAGS = MISCREG_DR_BASE + NumDRegs, + // Extended feature enable register + MISCREG_EFER, + // Segment selectors MISCREG_SEG_SEL_BASE, MISCREG_ES = MISCREG_SEG_SEL_BASE, |