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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
| commit | aaa30714b3808a9283cda41bf29e167bf6b8edb0 (patch) | |
| tree | adb8b30eb4a363e6b6f8687d730ec85b17c33b8e /src/arch/x86/miscregs.hh | |
| parent | ada071db53208bf02afee79390d1169130ce99ed (diff) | |
| download | gem5-aaa30714b3808a9283cda41bf29e167bf6b8edb0.tar.xz | |
X86: Various fixes to indexing segmentation related registers
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
Diffstat (limited to 'src/arch/x86/miscregs.hh')
| -rw-r--r-- | src/arch/x86/miscregs.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/x86/miscregs.hh b/src/arch/x86/miscregs.hh index a516a2018..3a30b9800 100644 --- a/src/arch/x86/miscregs.hh +++ b/src/arch/x86/miscregs.hh @@ -258,6 +258,7 @@ namespace X86ISA MISCREG_DS, MISCREG_FS, MISCREG_GS, + MISCREG_INT, // This isn't actually used. // Hidden segment base field MISCREG_SEG_BASE_BASE = MISCREG_SEG_SEL_BASE + NumSegments, @@ -267,6 +268,7 @@ namespace X86ISA MISCREG_DS_BASE, MISCREG_FS_BASE, MISCREG_GS_BASE, + MISCREG_INT_BASE, // Hidden segment limit field MISCREG_SEG_LIMIT_BASE = MISCREG_SEG_BASE_BASE + NumSegments, @@ -276,6 +278,7 @@ namespace X86ISA MISCREG_DS_LIMIT, MISCREG_FS_LIMIT, MISCREG_GS_LIMIT, + MISCREG_INT_LIMIT, // This isn't actually used. // Hidden segment limit attributes MISCREG_SEG_ATTR_BASE = MISCREG_SEG_LIMIT_BASE + NumSegments, @@ -285,6 +288,7 @@ namespace X86ISA MISCREG_DS_ATTR, MISCREG_FS_ATTR, MISCREG_GS_ATTR, + MISCREG_INT_ATTR, // This isn't actually used. // System segment selectors MISCREG_SYSSEG_SEL_BASE = MISCREG_SEG_ATTR_BASE + NumSegments, |