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author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 00:33:02 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-30 00:33:02 -0700 |
commit | 1d8822a3647244d2386568f688203a48bda7b49e (patch) | |
tree | 3fa6ffc863fbda9826b98dfe24baf2dbec197eae /src/arch/x86/mmapped_ipr.hh | |
parent | facb40f3ffce30cd9bc3b904eed5761d2d8b91c9 (diff) | |
download | gem5-1d8822a3647244d2386568f688203a48bda7b49e.tar.xz |
X86: Get rid of more uses of FULL_SYSTEM.
Diffstat (limited to 'src/arch/x86/mmapped_ipr.hh')
-rw-r--r-- | src/arch/x86/mmapped_ipr.hh | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/arch/x86/mmapped_ipr.hh b/src/arch/x86/mmapped_ipr.hh index 525f54bfb..054f280a8 100644 --- a/src/arch/x86/mmapped_ipr.hh +++ b/src/arch/x86/mmapped_ipr.hh @@ -47,7 +47,6 @@ */ #include "arch/x86/regs/misc.hh" -#include "config/full_system.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "mem/packet.hh" @@ -57,25 +56,18 @@ namespace X86ISA inline Tick handleIprRead(ThreadContext *xc, Packet *pkt) { -#if !FULL_SYSTEM - panic("Shouldn't have a memory mapped register in SE\n"); -#else Addr offset = pkt->getAddr() & mask(3); MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg)); MiscReg data = htog(xc->readMiscReg(index)); // Make sure we don't trot off the end of data. assert(offset + pkt->getSize() <= sizeof(MiscReg)); pkt->setData(((uint8_t *)&data) + offset); -#endif return xc->getCpuPtr()->ticks(1); } inline Tick handleIprWrite(ThreadContext *xc, Packet *pkt) { -#if !FULL_SYSTEM - panic("Shouldn't have a memory mapped register in SE\n"); -#else Addr offset = pkt->getAddr() & mask(3); MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg)); MiscReg data; @@ -84,7 +76,6 @@ namespace X86ISA assert(offset + pkt->getSize() <= sizeof(MiscReg)); pkt->writeData(((uint8_t *)&data) + offset); xc->setMiscReg(index, gtoh(data)); -#endif return xc->getCpuPtr()->ticks(1); } }; |