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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:21 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:21 -0800
commit40fdba2454c219902db7ad1abd28593de8611c2b (patch)
tree79369b7e2d1caae9f0accd45e6f9a0f53c1002f2 /src/arch/x86/pagetable_walker.hh
parent6ed47e94644f854baa33d1e9f367cc9eebd99abf (diff)
downloadgem5-40fdba2454c219902db7ad1abd28593de8611c2b.tar.xz
X86: Make the X86 TLB take advantage of delayed translations, and get rid of the fake TLB miss faults.
Diffstat (limited to 'src/arch/x86/pagetable_walker.hh')
-rw-r--r--src/arch/x86/pagetable_walker.hh26
1 files changed, 22 insertions, 4 deletions
diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh
index de3f21195..992711acd 100644
--- a/src/arch/x86/pagetable_walker.hh
+++ b/src/arch/x86/pagetable_walker.hh
@@ -91,11 +91,22 @@ namespace X86ISA
// if the machine is finished, or points to a packet to initiate
// the next read. If any write is required to update an "accessed"
// bit, write will point to a packet to do the write. Otherwise it
- // will be NULL.
- void doNext(PacketPtr &read, PacketPtr &write);
+ // will be NULL. The return value is whatever fault was incurred
+ // during this stage of the lookup.
+ Fault doNext(PacketPtr &read, PacketPtr &write);
// Kick off the state machine.
- void start(ThreadContext * _tc, Addr vaddr, bool write, bool execute);
+ Fault start(ThreadContext * _tc, BaseTLB::Translation *translation,
+ RequestPtr req, bool write, bool execute);
+ // Clean up after the state machine.
+ void
+ stop()
+ {
+ nextState = Ready;
+ delete read->req;
+ delete read;
+ read = NULL;
+ }
protected:
@@ -111,6 +122,11 @@ namespace X86ISA
bool retrying;
/*
+ * The fault, if any, that's waiting to be delivered in timing mode.
+ */
+ Fault timingFault;
+
+ /*
* Functions for dealing with packets.
*/
bool recvTiming(PacketPtr pkt);
@@ -156,16 +172,18 @@ namespace X86ISA
// The TLB we're supposed to load.
TLB * tlb;
System * sys;
+ BaseTLB::Translation * translation;
/*
* State machine state.
*/
ThreadContext * tc;
+ RequestPtr req;
State state;
State nextState;
int size;
bool enableNX;
- bool write, execute;
+ bool write, execute, user;
TlbEntry entry;
Fault pageFault(bool present);