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author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-21 19:19:53 +0000 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-21 19:19:53 +0000 |
commit | 0a80d06deaaf6fc574abacc2fed9b74d0bca1085 (patch) | |
tree | 070b5addf386a199fb9837c07eabe85191b5d3ba /src/arch/x86/predecoder.hh | |
parent | 3efec59fc55a439353adbd859722d8a5d170c18d (diff) | |
download | gem5-0a80d06deaaf6fc574abacc2fed9b74d0bca1085.tar.xz |
Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
Diffstat (limited to 'src/arch/x86/predecoder.hh')
-rw-r--r-- | src/arch/x86/predecoder.hh | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/x86/predecoder.hh b/src/arch/x86/predecoder.hh index d7734be88..1df17d6d2 100644 --- a/src/arch/x86/predecoder.hh +++ b/src/arch/x86/predecoder.hh @@ -144,12 +144,12 @@ namespace X86ISA int immediateCollected; enum State { - Prefix, - Opcode, - ModRM, - SIB, - Displacement, - Immediate, + PrefixState, + OpcodeState, + ModRMState, + SIBState, + DisplacementState, + ImmediateState, //We should never get to this state. Getting here is an error. ErrorState }; @@ -168,7 +168,7 @@ namespace X86ISA Predecoder(ThreadContext * _tc) : tc(_tc), basePC(0), offset(0), outOfBytes(true), emiIsReady(false), - state(Prefix) + state(PrefixState) {} ThreadContext * getTC() |