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authorGabe Black <gblack@eecs.umich.edu>2007-08-04 20:12:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-04 20:12:54 -0700
commite410a925df8d37f386c97dc7cdd9a78347ce4700 (patch)
treeb4102987453b1303051dfeea61aa1a45c2e5e75f /src/arch/x86/process.cc
parentced6cbcccf4540358093f060dad4d59ad6557d6a (diff)
downloadgem5-e410a925df8d37f386c97dc7cdd9a78347ce4700.tar.xz
X86: Start implementing segmentation support.
Make instructions observe segment prefixes, default segment rules, segment base addresses. Also fix some microcode and add sib and riprel "keywords" to the x86 specialization of the microassembler. --HG-- extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
Diffstat (limited to 'src/arch/x86/process.cc')
-rw-r--r--src/arch/x86/process.cc10
1 files changed, 3 insertions, 7 deletions
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 3cb027d41..364050994 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -88,6 +88,7 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/process.hh"
+#include "arch/x86/segmentregs.hh"
#include "arch/x86/types.hh"
#include "base/loader/object_file.hh"
#include "base/loader/elf_object.hh"
@@ -145,13 +146,8 @@ void
X86LiveProcess::startup()
{
argsInit(sizeof(IntReg), VMPageSize);
-
- //The AMD64 abi says that only rsp and rdx are defined at process
- //startup. rsp will be set by argsInit, and I don't understand what
- //rdx should be set to. The other floating point and integer registers
- //will be zeroed by the register file constructors, but control registers
- //should be initialized here. Since none of those are implemented, there
- //isn't anything here.
+ for(int i = 0; i < NUM_SEGMENTREGS; i++)
+ threadContexts[0]->setMiscRegNoEffect(MISCREG_ES_BASE + i, 0);
}
void