diff options
| author | Gabe Black <gabeblack@google.com> | 2018-11-20 16:58:19 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-01-31 11:04:13 +0000 |
| commit | b859a7030d883cc208347387b19285c53b64fb54 (patch) | |
| tree | 3b70cba6c8c102bb07476ee69b0ce38ca6f86a09 /src/arch/x86/pseudo_inst.cc | |
| parent | ad775e013572aeb06ccff949dfd2cf7fffb5454f (diff) | |
| download | gem5-b859a7030d883cc208347387b19285c53b64fb54.tar.xz | |
x86: Stop using/defining some ISA specific register types.
These have been replaced with the generic RegVal type.
Change-Id: I75c1134212067dea43aa0903d813633e06f3d6c6
Reviewed-on: https://gem5-review.googlesource.com/c/14476
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/x86/pseudo_inst.cc')
| -rw-r--r-- | src/arch/x86/pseudo_inst.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/pseudo_inst.cc b/src/arch/x86/pseudo_inst.cc index c0ec11059..90000b808 100644 --- a/src/arch/x86/pseudo_inst.cc +++ b/src/arch/x86/pseudo_inst.cc @@ -52,7 +52,7 @@ m5Syscall(ThreadContext *tc) Fault fault; tc->syscall(tc->readIntReg(INTREG_RAX), &fault); - MiscReg rflags = tc->readMiscReg(MISCREG_RFLAGS); + RegVal rflags = tc->readMiscReg(MISCREG_RFLAGS); rflags &= ~(1 << 16); tc->setMiscReg(MISCREG_RFLAGS, rflags); } |