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authorSteve Reinhardt <stever@gmail.com>2007-07-31 00:37:07 -0400
committerSteve Reinhardt <stever@gmail.com>2007-07-31 00:37:07 -0400
commitc4c8a121863fcbde7ba67823f06a3f7564c27cba (patch)
treeaccca43f0d87a07f3bcedf46a88fd6e3a5e86167 /src/arch/x86/regfile.cc
parent2f93db6f95b02d2bedf9571330a3185ac3fa7fa9 (diff)
parentae3e1d22fc3bfff8c246a0a743b77f4096d95b74 (diff)
downloadgem5-c4c8a121863fcbde7ba67823f06a3f7564c27cba.tar.xz
Merge from head.
--HG-- extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
Diffstat (limited to 'src/arch/x86/regfile.cc')
-rw-r--r--src/arch/x86/regfile.cc9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/arch/x86/regfile.cc b/src/arch/x86/regfile.cc
index f54f531e2..96283cada 100644
--- a/src/arch/x86/regfile.cc
+++ b/src/arch/x86/regfile.cc
@@ -86,6 +86,7 @@
*/
#include "arch/x86/regfile.hh"
+#include "base/trace.hh"
#include "sim/serialize.hh"
#include "cpu/thread_context.hh"
@@ -209,8 +210,12 @@ void RegFile::setIntReg(int intReg, const IntReg &val)
int X86ISA::flattenIntIndex(ThreadContext * tc, int reg)
{
- //For right now, don't do any flattening
- return reg;
+ //If we need to fold over the index to match byte semantics, do that.
+ //Otherwise, just strip off any extra bits and pass it through.
+ if (reg & (1 << 6))
+ return (reg & ~(1 << 6) - 0x4);
+ else
+ return (reg & ~(1 << 6));
}
void RegFile::serialize(std::ostream &os)