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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:21 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:21 -0700
commit43345bff6c4ee2fd5a35760776898eefa690329e (patch)
treeabab8a0c414f7d1053f987530cfcbe0ae4974d03 /src/arch/x86/regfile.cc
parent1b29f1621d714c6dc0f2ab921f12e9eb1dbfcd46 (diff)
downloadgem5-43345bff6c4ee2fd5a35760776898eefa690329e.tar.xz
Registers: Move the PCs out of the ISAs and into the CPUs.
Diffstat (limited to 'src/arch/x86/regfile.cc')
-rw-r--r--src/arch/x86/regfile.cc37
1 files changed, 0 insertions, 37 deletions
diff --git a/src/arch/x86/regfile.cc b/src/arch/x86/regfile.cc
index 54bc0999d..67ef0b128 100644
--- a/src/arch/x86/regfile.cc
+++ b/src/arch/x86/regfile.cc
@@ -85,48 +85,11 @@
* Authors: Gabe Black
*/
-#include "arch/x86/floatregs.hh"
#include "arch/x86/miscregs.hh"
#include "arch/x86/regfile.hh"
#include "base/trace.hh"
-#include "sim/serialize.hh"
#include "cpu/thread_context.hh"
-class Checkpoint;
-
-using namespace X86ISA;
-using namespace std;
-
-//RegFile class methods
-Addr RegFile::readPC()
-{
- return rip;
-}
-
-void RegFile::setPC(Addr val)
-{
- rip = val;
-}
-
-Addr RegFile::readNextPC()
-{
- return nextRip;
-}
-
-void RegFile::setNextPC(Addr val)
-{
- nextRip = val;
-}
-
-Addr RegFile::readNextNPC()
-{
- //There's no way to know how big the -next- instruction will be.
- return nextRip + 1;
-}
-
-void RegFile::setNextNPC(Addr val)
-{ }
-
void
X86ISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
{