Make the register indices use the appropriate "fold" bit.

--HG--
extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d

1 files changed, 7 insertions, 2 deletions

diff --git a/src/arch/x86/regfile.cc b/src/arch/x86/regfile.cc
index f54f531e2..96283cada 100644
--- a/src/arch/x86/regfile.cc
+++ b/src/arch/x86/regfile.cc
@@ -86,6 +86,7 @@
  */
 
 #include "arch/x86/regfile.hh"
+#include "base/trace.hh"
 #include "sim/serialize.hh"
 #include "cpu/thread_context.hh"
 
@@ -209,8 +210,12 @@ void RegFile::setIntReg(int intReg, const IntReg &val)
 
 int X86ISA::flattenIntIndex(ThreadContext * tc, int reg)
 {
-    //For right now, don't do any flattening
-    return reg;
+    //If we need to fold over the index to match byte semantics, do that.
+    //Otherwise, just strip off any extra bits and pass it through.
+    if (reg & (1 << 6))
+        return (reg & ~(1 << 6) - 0x4);
+    else
+        return (reg & ~(1 << 6));
 }
 
 void RegFile::serialize(std::ostream &os)