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| author | Ciro Santilli <ciro.santilli@arm.com> | 2018-09-19 15:50:46 +0100 |
|---|---|---|
| committer | Ciro Santilli <ciro.santilli@arm.com> | 2018-10-19 15:11:33 +0000 |
| commit | 33b311d8d8b8d527d500d62a35b50be63e41b556 (patch) | |
| tree | bc5f6f1c069f7d4c03fdcb85f65c8f7aabc2c413 /src/arch/x86/registers.hh | |
| parent | e9434cff87762255bc055e04a2695e70a53c41a2 (diff) | |
| download | gem5-33b311d8d8b8d527d500d62a35b50be63e41b556.tar.xz | |
arm: update hint instruction decoding to match ARMv8.5
This fixes:
- unallocated hints that have since been allocated
- unallocated and unimplemented hint instructions being treated as
Unknown instead of the correct NOP
- missing encoding for DBG on A32
Unallocated and unimplemented hints give a warning if executed.
The most important fix was for the CSDB Spectre mitigation
instruction, which was added recently and previously unallocated and
treated as Unknown.
The Linux kernel v4.18 ARMv7 uses CSDB it and boot would
fail with "undefined instruction" since Linux commit
1d4238c56f9816ce0f9c8dbe42d7f2ad81cb6613
Change-Id: I283da3f08a9af4148edc6fb3ca2930cbb97126b8
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13475
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/x86/registers.hh')
0 files changed, 0 insertions, 0 deletions