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authorAlexandru Dutu <alexandru.dutu@amd.com>2014-11-23 18:01:08 -0800
committerAlexandru Dutu <alexandru.dutu@amd.com>2014-11-23 18:01:08 -0800
commitf743bdcb6994a4e0e413e1a3499f7424b5ec2efa (patch)
tree86f81f804d3a17f4c1b4530e040e144fcf21389b /src/arch/x86/system.hh
parentadbaa4dfde96d5aaf84adf0ae4989ef880aad726 (diff)
downloadgem5-f743bdcb6994a4e0e413e1a3499f7424b5ec2efa.tar.xz
x86: Segment initialization to support KvmCPU in SE
This patch sets up low and high privilege code and data segments and places them in the following order: cs low, ds low, ds, cs, in the GDT. Additionally, a syscall and page fault handler for KvmCPU in SE mode are defined. The order of the segment selectors in GDT is required in this manner for interrupt handling to work properly. Segment initialization is done for all the thread contexts.
Diffstat (limited to 'src/arch/x86/system.hh')
-rw-r--r--src/arch/x86/system.hh8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/x86/system.hh b/src/arch/x86/system.hh
index e8dd2f8b3..578110a7b 100644
--- a/src/arch/x86/system.hh
+++ b/src/arch/x86/system.hh
@@ -43,6 +43,7 @@
#include <string>
#include <vector>
+#include "arch/x86/regs/misc.hh"
#include "base/loader/symtab.hh"
#include "cpu/pc_event.hh"
#include "kern/system_events.hh"
@@ -62,6 +63,9 @@ namespace X86ISA
class ConfigTable;
}
+ void installSegDesc(ThreadContext *tc, SegmentRegIndex seg,
+ SegDescriptor desc, bool longmode);
+
/* memory mappings for KVMCpu in SE mode */
const uint64_t syscallCodeVirtAddr = 0xffff800000000000;
const uint64_t syscallCodePhysAddr = 0x60000;
@@ -73,6 +77,10 @@ namespace X86ISA
const uint64_t TSSPhysAddr = 0x63000;
const uint64_t ISTVirtAddr = 0xffff800000004000;
const uint64_t ISTPhysAddr = 0x64000;
+ const uint64_t PFHandlerVirtAddr = 0xffff800000005000;
+ const uint64_t PFHandlerPhysAddr = 0x65000;
+ const uint64_t MMIORegionVirtAddr = 0xffffc90000000000;
+ const uint64_t MMIORegionPhysAddr = 0xffff0000;
const uint64_t pageTablePhysAddr = 0x70000;
}