Address translation: Make the page table more flexible.

The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d

1 files changed, 12 insertions, 0 deletions

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index bf2458fdf..e29ec58c2 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -60,8 +60,20 @@
 #include "arch/x86/tlb.hh"
 #include "params/X86DTB.hh"
 #include "params/X86ITB.hh"
+#include "sim/serialize.hh"
 
 namespace X86ISA {
+    void
+    TlbEntry::serialize(std::ostream &os)
+    {
+        SERIALIZE_SCALAR(pageStart);
+    }
+
+    void
+    TlbEntry::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_SCALAR(pageStart);
+    }
 };
 
 X86ISA::ITB *