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author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 23:03:38 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-02 23:03:38 -0700 |
commit | 50e2d20cb876a054f53162e7b01306039c213457 (patch) | |
tree | 6e7de959159434e1501ab928bdfbebc91388b353 /src/arch/x86/tlb.cc | |
parent | c2d60abf52fc81119970ab0617f9a979f1377685 (diff) | |
parent | 7571e8346d0ebbc38806c30a75dbcf298d50f08e (diff) | |
download | gem5-50e2d20cb876a054f53162e7b01306039c213457.tar.xz |
Merge with head.
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r-- | src/arch/x86/tlb.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index f4a55129b..6cec246d1 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -187,13 +187,13 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) Tick DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) { - return tc->getCpuPtr()->cycles(1); + return tc->getCpuPtr()->ticks(1); } Tick DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) { - return tc->getCpuPtr()->cycles(1); + return tc->getCpuPtr()->ticks(1); } #endif |