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author | Gabe Black <gblack@eecs.umich.edu> | 2007-09-24 17:39:56 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-09-24 17:39:56 -0700 |
commit | 418ddf43e645133b3693ab8bf2e56656efcf1ebf (patch) | |
tree | c88d688929d2f957e174248db793565ce8b3fc6b /src/arch/x86/tlb.cc | |
parent | dd277e0d8f1e0303a74a29bd729864a4766e6f73 (diff) | |
download | gem5-418ddf43e645133b3693ab8bf2e56656efcf1ebf.tar.xz |
X86: Get X86_FS to compile.
--HG--
extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r-- | src/arch/x86/tlb.cc | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index d2db8cb0b..ad23cb7e4 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -57,6 +57,83 @@ #include <cstring> +#include "config/full_system.hh" + +#if FULL_SYSTEM + +#include "arch/x86/tlb.hh" +#include "base/bitfield.hh" +#include "base/trace.hh" +#include "cpu/thread_context.hh" +#include "cpu/base.hh" +#include "mem/packet_access.hh" +#include "mem/request.hh" +#include "sim/system.hh" + +namespace X86ISA { + +TLB::TLB(const Params *p) : SimObject(p) +{ +} + +Fault +ITB::translate(RequestPtr &req, ThreadContext *tc) +{ + return NoFault; +} + + + +Fault +DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) +{ + return NoFault; +}; + +#if FULL_SYSTEM + +Tick +DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) +{ + return tc->getCpuPtr()->cycles(1); +} + +Tick +DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) +{ + return tc->getCpuPtr()->cycles(1); +} + +#endif + +void +TLB::serialize(std::ostream &os) +{ +} + +void +TLB::unserialize(Checkpoint *cp, const std::string §ion) +{ +} + +void +DTB::serialize(std::ostream &os) +{ + TLB::serialize(os); +} + +void +DTB::unserialize(Checkpoint *cp, const std::string §ion) +{ + TLB::unserialize(cp, section); +} + +/* end namespace X86ISA */ } + +#else + +#include <cstring> + #include "arch/x86/tlb.hh" #include "params/X86DTB.hh" #include "params/X86ITB.hh" @@ -76,6 +153,8 @@ namespace X86ISA { } }; +#endif + X86ISA::ITB * X86ITBParams::create() { |