diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-08 22:21:27 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-08 22:21:27 -0700 |
commit | 7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60 (patch) | |
tree | 4c212f665de2628eac6f84d389de7a79b6d0b933 /src/arch/x86/tlb.cc | |
parent | 08043c777f1f05f5e14581950013461f328965be (diff) | |
download | gem5-7b5a96f06b530db35637aca6f9d0f7a2ddfa6e60.tar.xz |
tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r-- | src/arch/x86/tlb.cc | 61 |
1 files changed, 12 insertions, 49 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 3fec4c7da..2feed6f3e 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -700,55 +700,36 @@ TLB::translate(RequestPtr req, ThreadContext *tc, }; Fault -DTB::translateAtomic(RequestPtr req, ThreadContext *tc, bool write) +TLB::translateAtomic(RequestPtr req, ThreadContext *tc, + bool write, bool execute) { bool delayedResponse; return TLB::translate(req, tc, NULL, write, - false, delayedResponse, false); + execute, delayedResponse, false); } void -DTB::translateTiming(RequestPtr req, ThreadContext *tc, - Translation *translation, bool write) +TLB::translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation, bool write, bool execute) { bool delayedResponse; assert(translation); Fault fault = TLB::translate(req, tc, translation, - write, false, delayedResponse, true); + write, execute, delayedResponse, true); if (!delayedResponse) - translation->finish(fault, req, tc, write); -} - -Fault -ITB::translateAtomic(RequestPtr req, ThreadContext *tc) -{ - bool delayedResponse; - return TLB::translate(req, tc, NULL, false, - true, delayedResponse, false); -} - -void -ITB::translateTiming(RequestPtr req, ThreadContext *tc, - Translation *translation) -{ - bool delayedResponse; - assert(translation); - Fault fault = TLB::translate(req, tc, translation, - false, true, delayedResponse, true); - if (!delayedResponse) - translation->finish(fault, req, tc, false); + translation->finish(fault, req, tc, write, execute); } #if FULL_SYSTEM Tick -DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) +TLB::doMmuRegRead(ThreadContext *tc, Packet *pkt) { return tc->getCpuPtr()->ticks(1); } Tick -DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) +TLB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) { return tc->getCpuPtr()->ticks(1); } @@ -765,28 +746,10 @@ TLB::unserialize(Checkpoint *cp, const std::string §ion) { } -void -DTB::serialize(std::ostream &os) -{ - TLB::serialize(os); -} - -void -DTB::unserialize(Checkpoint *cp, const std::string §ion) -{ - TLB::unserialize(cp, section); -} - /* end namespace X86ISA */ } -X86ISA::ITB * -X86ITBParams::create() -{ - return new X86ISA::ITB(this); -} - -X86ISA::DTB * -X86DTBParams::create() +X86ISA::TLB * +X86TLBParams::create() { - return new X86ISA::DTB(this); + return new X86ISA::TLB(this); } |