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| author | Gabe Black <gblack@eecs.umich.edu> | 2012-05-27 19:01:04 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-05-27 19:01:04 -0700 |
| commit | 1d96135087be27b43ddfb5f2f508fbed8e0b7ebb (patch) | |
| tree | e82ea77a041b510681f1c326c56e8c699233af6b /src/arch/x86/tlb.cc | |
| parent | 19df4e94ee4f2323e5fe1b915f7e81a6034cfc56 (diff) | |
| download | gem5-1d96135087be27b43ddfb5f2f508fbed8e0b7ebb.tar.xz | |
X86: Truncate addresses to 32 bits except in 64 bit mode, not long mode.
A small change was added a while ago to keep addresses from overflowing 32
bits when larger addresses shouldn't be accessible to software. That change
truncated when not in long mode, but really it should have truncated when not
in 64 bit mode. The difference is whether compatibility mode is included, a
mode that's supposed to act like a legacy 32 bit mode.
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 8dad84dc4..eb6e9c530 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -289,7 +289,7 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation, return new GeneralProtection(0); } } - if (m5Reg.mode != LongMode || + if (m5Reg.submode != SixtyFourBitMode || (flags & (AddrSizeFlagBit << FlagShift))) vaddr &= mask(32); // If paging is enabled, do the translation. |