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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-11-23 06:10:17 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-11-23 06:10:17 -0500 |
| commit | 3cd349f44305d6ca9496f7f626f0f4f939bd84ad (patch) | |
| tree | 9bcccdaa2306359470744c411b440e4dc9f7011f /src/arch/x86/tlb.cc | |
| parent | c8c921b9db14d434781e7c55dee79a3a71db871d (diff) | |
| download | gem5-3cd349f44305d6ca9496f7f626f0f4f939bd84ad.tar.xz | |
X86: Obey the PCD (cache disable) bit in the page tables.
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 4c8d96f8b..52d9cdf9c 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -653,6 +653,8 @@ TLB::translate(RequestPtr req, ThreadContext *tc, Translation *translation, Addr paddr = entry->paddr | (vaddr & (entry->size-1)); DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, paddr); req->setPaddr(paddr); + if (entry->uncacheable) + req->setFlags(Request::UNCACHEABLE); } else { //Use the address which already has segmentation applied. DPRINTF(TLB, "Paging disabled.\n"); |