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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-27 16:25:06 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-27 16:25:06 -0800 |
| commit | d3214c5c5e0a05a1f7638bbe0570e0d2deddfdf6 (patch) | |
| tree | c09fa4f878340bad2ec94489b2641b4f2b901448 /src/arch/x86/tlb.cc | |
| parent | b84ae9bd403f3b6875a1db16595eebf6fbc2e623 (diff) | |
| download | gem5-d3214c5c5e0a05a1f7638bbe0570e0d2deddfdf6.tar.xz | |
X86: If PCI config space is disabled, pass through to regular IO addresses.
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 7b7af3288..dff62a4d7 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -518,6 +518,8 @@ TLB::translateInt(RequestPtr req, ThreadContext *tc) req->setPaddr(PhysAddrPrefixPciConfig | mbits(configAddress, 30, 2) | (IOPort & mask(2))); + } else { + req->setPaddr(PhysAddrPrefixIO | IOPort); } } else { req->setFlags(Request::UNCACHEABLE); |