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| author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-10-15 13:24:35 +0200 |
|---|---|---|
| committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-10-15 13:24:35 +0200 |
| commit | 5e7738467bbc928ff163afc5b94c81385cc6778e (patch) | |
| tree | ae407db632d031b2d1144347d80cb16073219081 /src/arch/x86/tlb.cc | |
| parent | c753b273dc1d18114035c4bd5c61bd59fa9f9cfe (diff) | |
| download | gem5-5e7738467bbc928ff163afc5b94c81385cc6778e.tar.xz | |
mem: Use a flag instead of address bit 63 for generic IPRs
Using address bit 63 to identify generic IPRs caused problems on
SPARC, where IPRs are heavily used. This changeset redefines how
generic IPRs are identified. Instead of using bit 63, we now use a
separate flag (GENERIC_IPR) a memory request.
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index e6ca166b3..458f33069 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -257,7 +257,7 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const req->setPaddr(x86LocalAPICAddress(tc->contextId(), paddr - apicRange.start())); } else if (m5opRange.contains(paddr)) { - req->setFlags(Request::MMAPPED_IPR); + req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR); req->setPaddr(GenericISA::iprAddressPseudoInst( (paddr >> 8) & 0xFF, paddr & 0xFF)); |