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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:03:39 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-12-01 23:03:39 -0800 |
| commit | dc6f96017135da7f3beae5055195de3cf8e47c6c (patch) | |
| tree | b8fad747c652fe34db462bf585be4d184da02d6b /src/arch/x86/tlb.cc | |
| parent | a548067b01ed99d4abc9483ca11466d3d9d4ceca (diff) | |
| download | gem5-dc6f96017135da7f3beae5055195de3cf8e47c6c.tar.xz | |
X86: Reorganize segmentation and implement segment selector movs.
--HG--
extra : convert_revision : 553c3ffeda1f5312cf02493f602e7d4ba2fe66e8
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 68a22bc16..08c621615 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -176,14 +176,14 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) uint32_t flags = req->getFlags(); bool storeCheck = flags & StoreCheck; - int seg = flags & mask(3); + int seg = flags & mask(4); //XXX Junk code to surpress the warning if (storeCheck); // If this is true, we're dealing with a request to read an internal // value. - if (seg == SEGMENT_REG_INT) { + if (seg == SEGMENT_REG_MS) { DPRINTF(TLB, "Addresses references internal memory.\n"); Addr prefix = vaddr & IntAddrPrefixMask; if (prefix == IntAddrPrefixCPUID) { |