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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-03-01 11:37:03 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-03-01 11:37:03 -0600 |
| commit | 4b32c9fb4d9d1b1507a4f0683b131d70918831ce (patch) | |
| tree | 0b0f670e2d8445b10e8772dd8173902e880c756b /src/arch/x86/tlb.cc | |
| parent | c80af04d7df7586352841a65a4398baf21e0c122 (diff) | |
| download | gem5-4b32c9fb4d9d1b1507a4f0683b131d70918831ce.tar.xz | |
x86: Fix x86 TLB and Walker
This patch adds a function to X86 tlb that returns the
walker port. This port is required for correctly connecting
the walker ports for the cpu just switched in
Diffstat (limited to 'src/arch/x86/tlb.cc')
| -rw-r--r-- | src/arch/x86/tlb.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index ff65eb04c..456f03208 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -421,6 +421,12 @@ TLB::unserialize(Checkpoint *cp, const std::string §ion) { } +Port * +TLB::getPort() +{ + return walker->getPort("port"); +} + } // namespace X86ISA X86ISA::TLB * |