X86: Get PCI config space to work, and adjust address space prefix numbering scheme.

--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6

1 files changed, 20 insertions, 2 deletions

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 2e6ea4a22..acac3081a 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -76,7 +76,7 @@
 
 namespace X86ISA {
 
-TLB::TLB(const Params *p) : SimObject(p), size(p->size)
+TLB::TLB(const Params *p) : SimObject(p), configAddress(0), size(p->size)
 {
     tlb = new TlbEntry[size];
     std::memset(tlb, 0, sizeof(TlbEntry) * size);
@@ -148,6 +148,12 @@ TLB::invalidateAll()
 }
 
 void
+TLB::setConfigAddress(uint32_t addr)
+{
+    configAddress = addr;
+}
+
+void
 TLB::invalidateNonGlobal()
 {
     DPRINTF(TLB, "Invalidating all non global entries.\n");
@@ -478,7 +484,19 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute)
             // Make sure the address fits in the expected 16 bit IO address
             // space.
             assert(!(IOPort & ~0xFFFF));
-            req->setPaddr(PhysAddrPrefixIO | IOPort);
+            if (IOPort == 0xCF8 && req->getSize() == 4) {
+                req->setMmapedIpr(true);
+                req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
+            } else if ((IOPort & ~mask(2)) == 0xCFC) {
+                Addr configAddress =
+                    tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
+                if (bits(configAddress, 31, 31)) {
+                    req->setPaddr(PhysAddrPrefixPciConfig |
+                            bits(configAddress, 30, 0));
+                }
+            } else {
+                req->setPaddr(PhysAddrPrefixIO | IOPort);
+            }
             return NoFault;
         } else {
             panic("Access to unrecognized internal address space %#x.\n",