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author | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-11-12 14:37:54 -0800 |
commit | aaa30714b3808a9283cda41bf29e167bf6b8edb0 (patch) | |
tree | adb8b30eb4a363e6b6f8687d730ec85b17c33b8e /src/arch/x86/tlb.cc | |
parent | ada071db53208bf02afee79390d1169130ce99ed (diff) | |
download | gem5-aaa30714b3808a9283cda41bf29e167bf6b8edb0.tar.xz |
X86: Various fixes to indexing segmentation related registers
--HG--
extra : convert_revision : 3d45da3a3fb38327582cfdfb72cfc4ce1b1d31af
Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r-- | src/arch/x86/tlb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 6afee6d72..bf5a8434b 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -150,7 +150,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute) // If this is true, we're dealing with a request to read an internal // value. - if (seg == NUM_SEGMENTREGS) { + if (seg == SEGMENT_REG_INT) { Addr prefix = vaddr & IntAddrPrefixMask; if (prefix == IntAddrPrefixCPUID) { panic("CPUID memory space not yet implemented!\n"); |