diff options
author | Gabe Black <gabeblack@google.com> | 2018-11-20 16:58:19 -0800 |
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committer | Gabe Black <gabeblack@google.com> | 2019-01-31 11:04:13 +0000 |
commit | b859a7030d883cc208347387b19285c53b64fb54 (patch) | |
tree | 3b70cba6c8c102bb07476ee69b0ce38ca6f86a09 /src/arch/x86/tlb.cc | |
parent | ad775e013572aeb06ccff949dfd2cf7fffb5454f (diff) | |
download | gem5-b859a7030d883cc208347387b19285c53b64fb54.tar.xz |
x86: Stop using/defining some ISA specific register types.
These have been replaced with the generic RegVal type.
Change-Id: I75c1134212067dea43aa0903d813633e06f3d6c6
Reviewed-on: https://gem5-review.googlesource.com/c/14476
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/x86/tlb.cc')
-rw-r--r-- | src/arch/x86/tlb.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 8e83208f4..589b2b7eb 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -185,10 +185,10 @@ TLB::translateInt(const RequestPtr &req, ThreadContext *tc) if (!msrAddrToIndex(regNum, vaddr)) return std::make_shared<GeneralProtection>(0); - //The index is multiplied by the size of a MiscReg so that + //The index is multiplied by the size of a RegVal so that //any memory dependence calculations will not see these as //overlapping. - req->setPaddr((Addr)regNum * sizeof(MiscReg)); + req->setPaddr((Addr)regNum * sizeof(RegVal)); return NoFault; } else if (prefix == IntAddrPrefixIO) { // TODO If CPL > IOPL or in virtual mode, check the I/O permission @@ -200,7 +200,7 @@ TLB::translateInt(const RequestPtr &req, ThreadContext *tc) assert(!(IOPort & ~0xFFFF)); if (IOPort == 0xCF8 && req->getSize() == 4) { req->setFlags(Request::MMAPPED_IPR); - req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg)); + req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(RegVal)); } else if ((IOPort & ~mask(2)) == 0xCFC) { req->setFlags(Request::UNCACHEABLE | Request::STRICT_ORDER); Addr configAddress = |