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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:44 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:15:44 -0800
commit5605079b1f20bc7f6a4a80c8d1e4daabe7125270 (patch)
tree29dfa1685e3e257e3857ef7f9672778d43582440 /src/arch/x86/tlb.hh
parenta1aba01a02a8c1261120de83d8fbfd6624f0cb17 (diff)
downloadgem5-5605079b1f20bc7f6a4a80c8d1e4daabe7125270.tar.xz
ISA: Replace the translate functions in the TLBs with translateAtomic.
Diffstat (limited to 'src/arch/x86/tlb.hh')
-rw-r--r--src/arch/x86/tlb.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index 56d635a90..91bb4a761 100644
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -138,7 +138,7 @@ namespace X86ISA
EntryList entryList;
template<class TlbFault>
- Fault translate(RequestPtr &req, ThreadContext *tc,
+ Fault translateAtomic(RequestPtr &req, ThreadContext *tc,
bool write, bool execute);
public:
@@ -159,7 +159,7 @@ namespace X86ISA
_allowNX = false;
}
- Fault translate(RequestPtr &req, ThreadContext *tc);
+ Fault translateAtomic(RequestPtr &req, ThreadContext *tc);
friend class DTB;
};
@@ -172,7 +172,7 @@ namespace X86ISA
{
_allowNX = true;
}
- Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
+ Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write);
#if FULL_SYSTEM
Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);